Cooper Lake: Intel's Xeons with bfloat16 instruction have 56 cores

Intel has announced that the Cooper Lake have over 56 CPU cores. This is the name of the next internal server generation for Xeon, which will follow the current Cascade Lake AP / SP aka Xeon 8200/9200 in early 2020. The announcement today is not surprising – because tomorrow AMD will present with Rome its Eypc called processors with 64 cores and 7 nm.

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A year ago, Intel had said that Cooper Lake was following Cascade Lake, but did not comment on the number of cores. The Xeon Platinum 9200 already has 56 cores, they consist internally of two chips and are only available as a soldered BGA package. For Cooper Lake, a regular socket is used, apparently the version LGA 4189 instead of the previous LGA 3647.

That's unavoidable because the new socket supports eight instead of six DDR4 memory channels, as does AMD's Epyc. However, Intel expects Cooper Lake with 56 cores to continue to have a lower thermal dissipation than 14-core Cascade Lake SP, despite continuing 14 nm. The top model, the Xeon Platinum 9282, comes to a whopping 400 watts – regular versions with 28 cores are currently content with 240 watts.

Cooper Lake supports AVX512_BF16, an instruction to speed up the bfloat16 format. This is often used for machine learning, and Intel already supports it with the Nervana NNP-L1000 ASICs and Agilex FPGAs. Google also provides support in its own cloud TPUs and in the Tensorflow framework. Obscure detail: Ice Lake, the 10 nm successor to Cooper Lake, also uses the Socket LGA 4189, but only has 26 cores and no bfloat16.